Parasitics in VLSI Circuits and the Role of Layout Verification
نویسندگان
چکیده
Integrated circuits consist of active devices and an interconnection network fabricated on a semi-conducting substrate. The properties of the interconnections and the substrate are increasingly important factors affecting the performance and operation of the circuit as a whole, amplifying the need for layout verification. In this paper, we discuss the behavior of IC interconnections and substrates, their electrical significance, and what constitutes an effective model for them. We conclude by reviewing the increased importance and new requirements of post-layout design verification.
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تاریخ انتشار 1993